Specifications
Family
GD25LR
Density
128Mb
Voltage
1.65V - 2.0V
I/O Bus
Single I/O, Dual Output, Dual I/O, Quad Output, Quad I/O, QPI
Frequency (MHz)
120
Organization
4KB, 32KB, 64KB
Status
Under development
Features
HOLD# PIN
-
H/W Reset (Reset Pin)
-
S/W Reset
-
Output Driver Strength
-
Volatile & Non-Volatile Status Register Bits
-
H/W Write Protection (WP# Pin)
-
S/W Write Protection
-
Enchanced Block Protection
-
Security Registers with OTP locks
SFDP Register
