GD32E5xx Series
based on the ARM® Cortex®-M33 core with main frequency of up to 180MHz.
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Overview
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Overview
The GD32E5 series of MCUs is a 32-bit general-purpose microcontroller based on the ARM® Cortex®-M33 core. The Cortex®-M33 processor from Armv8 architecture features supports processor frequency up to 180MHz. It also supports a powerful extendable instruction set including general data processing I/O control tasks, enhanced data processing bit field operations, DSP, and floating-point unit (FPU).
The G32E5 series of MCUs is also equipped with a new hardware trigonometric math unit (TMU) that supports vector, sine, cosine, exponent, square root, common logarithm, and other mathematical trigonometric operations, reducing the burden on the CPU and improving the processing efficiency. Additionally, it has a built-in memory protection unit (MPU) for task isolations, improving system reliability.
The chip operates from 1.7V to 3.6V power supply with I/O port supporting 5V voltage levels and is available in the -40℃ to 85℃ operation temperature range. This series offers five power saving modes for maximum optimization between wakeup latency and power consumption, which is an important consideration in low power applications.
The GD32E5 series of MCUs is suitable for a wide range of application scenarios such as high-precision industrial control, digital power supply, motor inverters, measuring instruments, mixed-signal processing, high-end consumer products, and so on.
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43 Results
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Part No
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Core
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Series
GD32E518
GD32E517
GD32E513
GD32E508
GD32E507
GD32E505
GD32E503
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Package
QFN48
LQFP64
LQFP48
LQFP144
LQFP100
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Max Speed (MHz)
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Flash (Bytes)
128K
256K
512K
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SRAM (Bytes)
80K
96K
128K
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I/O
up to 80
up to 51
up to 37
up to 112
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GPTM (32bit)
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GPTM (16bit)
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Advanced TM (16bit)
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HRTM
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Basic TM (64bit)
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Basic TM (32bit)
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Basic TM (16bit)
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LPTM (32bit)
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LPTM (16bit)
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SysTick (64bit)
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SysTick (24bit)
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WDG
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RTC
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USART+UART
3+0
4+2
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LPUART
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I2C
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QSPI
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SPI
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I2S
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CAN 2.0B
2
3xFD
3
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USB 2.0
FS
(FS+HS) OTG
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Ethernet
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EtherCAT Slave Controller
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SDIO
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MFCOM
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LIN
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LCD-TFT
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Segment LCD
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Camera
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IPA
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SAI
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TMU
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EXMC
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CEC
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14bit ADC Units (CHs)
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12bit ADC Units (CHs)
2(16)
3(21)
3(16)
3(10)
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12bit DAC Units
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Comp
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IEEE 802.11
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Bluetooth
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Dflash(Bytes)
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SENT
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Functional Safety
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Security
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Temperature Range(TA)
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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Cortex®-M33 | GD32E518 | LQFP48 | 180 | 512K | 128K | up to 37 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(10) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E518 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E518 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E518 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(21) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP64 | 180 | 256K | 96K | up to 51 | 1 | 6 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP100 | 180 | 256K | 96K | up to 80 | 1 | 6 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP144 | 180 | 256K | 96K | up to 112 | 1 | 6 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(21) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E517 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(21) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | QFN48 | 180 | 256K | 96K | up to 37 | 1 | 6 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(10) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP48 | 180 | 256K | 96K | up to 37 | 1 | 6 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(10) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP48 | 180 | 512K | 128K | up to 37 | 1 | 12 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(10) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP64 | 180 | 256K | 96K | up to 51 | 1 | 6 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP100 | 180 | 256K | 96K | up to 80 | 1 | 6 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(16) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP144 | 180 | 256K | 96K | up to 112 | 1 | 6 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(21) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E513 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 12 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 3(21) | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E508 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E508 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E508 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3xFD | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP64 | 180 | 256K | 96K | up to 51 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP100 | 180 | 256K | 96K | up to 80 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP144 | 180 | 256K | 96K | up to 112 | 1 | 3 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E507 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP64 | 180 | 128K | 80K | up to 51 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP64 | 180 | 256K | 96K | up to 51 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP100 | 180 | 256K | 96K | up to 80 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP144 | 180 | 256K | 96K | up to 112 | 1 | 3 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E505 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 3 | (FS+HS) OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 2(16) | 2 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP48 | 180 | 256K | 96K | up to 37 | 1 | 3 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3(10) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP48 | 180 | 512K | 128K | up to 37 | 1 | 9 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3(10) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP64 | 180 | 256K | 96K | up to 51 | 1 | 3 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3(16) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP64 | 180 | 512K | 128K | up to 51 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3(16) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP100 | 180 | 256K | 96K | up to 80 | 1 | 3 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3(16) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP100 | 180 | 512K | 128K | up to 80 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3(16) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP144 | 180 | 256K | 96K | up to 112 | 1 | 3 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3(21) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Cortex®-M33 | GD32E503 | LQFP144 | 180 | 512K | 128K | up to 112 | 1 | 9 | 2 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 4+2 | 0 | 3 | 0 | 3 | 2 | 2 | FS | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3(21) | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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AN064 Calibration method of internal low speed oscillator using TIMER
2022-12-08
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2023-08-28
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AN068 GD32 MCU Eclipse development environment setup tutorial for Windows
2023-08-28
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AN075 Introduction of library invocation scheme based on MDK implementation
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2024-12-20
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AN095 Methods to improve the accuracy of the GD32 MCU temperature sensor
2024-06-04
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2024-07-11
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AN264 Using the EIDE Plugin in VS Code to Develop GD32 MCU_Rev1.0
2025-08-15
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